Semiconductor integrated circuits manufactured with Large Scale of Integration (LSI) technologies (LSI, VLSI, ULSI) require a protective layer against mechanical stress and aggressive chemical agents. This layer, generally called “passivation layer” is typically formed by silicon-based dielectrics, such as silicon dioxide (USG), phosphorus-doped or fluorurate-doped silicon oxide (PSG or FSG), silicon nitrides and nitride oxides (Si3N4, SiOxN).
The passivation layer is conventionally formed by means of Chemical Vapor Deposition (CVD) techniques, either Plasma-Enhanced (PECVD) or at Atmospheric Pressure (APCVD).
Final passivation layers formed by means of the above-referred conventional techniques have up to now proved to be sufficiently satisfactory, and in view of the relatively low cost of both PECVD and APCVD manufacturing equipment their use has never been disputed.
On the other hand, a new CVD technique has been known for some years for the formation of Inter-Metal Dielectric (IMD) protective films in ULSI circuits. Such a technique, called High-Density Plasma CVD (HDPCVD), is substantially a combination of two simultaneous processes, i.e., deposition and sputtering.
The advantage of HDPCVD over known alternative IMD film formation processes (such as PECVD, APCVD or Spin-On-Glass (SOG) processes) is that this technique allows for better (complete) filling of gaps between metal lines, even for sub-micrometric intra-metal line distances, of the integrated circuit.